The present invention generally relates to the manufacture of semiconductor-on-insulator (SOI) devices, and, more specifically, relates to the manufacture of SOI devices with enhanced floating body control through a leakage enhanced buried oxide.
Semiconductor-on-insulator (SOI) structures have several advantages over conventional bulk substrates: the elimination of latch-up, reduced short-channel effects, improved radiation hardness, dynamic coupling, lower parasitic junction capacitance, and simplified device isolation and fabrication. Such advantages allow semiconductor device manufacturers to produce low-voltage, low-power, high-speed devices thereon. For example, metal-oxide semiconductor field effect transistors (MOSFETs) are commonly formed on SOI structures. However, MOSFETs formed on such SOI structures suffer from a floating body effect (FBE).
Unlike bulk silicon MOSFETs, an SOI MOSFET is usually electrically floating in relation to the substrate. In a non-fully depleted MOSFET, carriers (holes in nMOSFETs and electrons in pMOSFETs) generated by impact ionization accumulate near the source/body junctions of the MOSFET. Eventually, sufficient carriers will accumulate to forward bias the body with respect to the source thus lowering the threshold voltage through the body-bias effect. Extra current will start flowing resulting in a xe2x80x9ckinkxe2x80x9d in the I-V characteristics. The extra current flow reduces the achievable gain and dynamic swing in analog circuits, and gives rise to an abnormality in the transfer characteristics in digital circuits. Additionally, the FBE causes higher device leakages and undesirable transient effects.
One attempted solution to solve problems due to the FBE is to provide a contact to the body for hole current collection. However, currently available hole collection schemes, including the use of a side-contact or a mosaic source, are very inefficient and consume significant amounts of wafer area.
Therefore, there exists a strong need in the art for an SOI structure with a buried insulator layer that bleeds off extra carriers through a channel defined by a device to the substrate.
According to one aspect of the invention, the invention is a semiconductor-on-insulator (SOI) device formed on an SOI structure. The MOSFET device includes a gate defining a channel (e.g. a p-type doped region) interposed between a source and a drain formed within one of the active regions defined by isolation trenches and a BOX layer. The SOI device includes a leakage enhanced region within the BOX layer defined by the gate.
According to another aspect of the invention, the invention is a method of fabricating an SOI device on an SOI structure. The method includes the step of forming an SOI substrate with a buried oxide (BOX) layer disposed thereon and an active layer disposed on the BOX layer having active regions defined by isolation trenches and the BOX layer. Next, a disposable gate is formed on the active region. During the formation of the disposable gate, a source and a drain are formed within one of the active regions with a channel defined by the disposable gate interposed between the source and the drain. Then, the disposable gate is removed and a leakage enhanced region is formed in the BOX layer through the removed disposable gate. Next, an active gate is formed on the active region where the disposable gate was removed.